MB40C348 |
RFQ for MB40C348 Required Field |
 |
| Product | Manufacturers | Pack | D/C |
| MB40C348 | - | SQFP120 | 06+ |
Features |
| • Resolution : 8 bit• No. of AD channels : 3 ch• Linearity error : ±0.40% (typical)• Maximum conversion rate : 100 MSPS (minimum)• Power supply voltage : 3.3 V (typical: internal circuit)• Digital input voltage range : TTL level• Digital output voltage range : 3.3 V CMOS level• Amp. input voltage range : 0.7 VP-P (typical)• Amp. gain : 1.9 double fixed• Power dissipation : 880 mW (typical)• Additional features : PLL circuit Video Amp. circuit (1.9 double fixed gain) CLAMP circuit VRT Amp. circuit (RGB 3 ch common) VRB Amp. circuit (RGB 3 ch common) Overflow output High impedance output, power down function• Package : LQFP120 (16 mm×16mm, lead pitch : 0.5 mm) |
| Parameter | Symbol | Rating | Unit | |
| Min. | Max. | |||
| Power supply voltage | AVDD, DVDD, PVDD | 0.3 | +4.0 | V |
| VESD | 0.3 | +7.0 | V | |
| Input/output voltage | RVIN, GVIN, BVIN, RADIN, GADIN, BADIN, RVCLP, GVCLP, BVCLP, VRT, VRTM, VREFT, VRB, VRBM, VREFB, VR1, VR2, VR3 VREF, RREF |
0.3 | AVDD+0.3*1 | V |
| RDA0 to RDA7, RDB0 to RDB7, GDA0 to GDA7, GDB0 to GDB7, BDA0 to BDA7, BDB0 to BDB7, DSYNC, DSYNCB, OF, COUT, CLK, CLKB, ADCLKA, ADCLKB |
-0.3 | DVDD+0.3*1 | V | |
| LPF | -0.3 | PVDD+0.3*1 | V | |
| DSEL, CK, DATA, CS, EXPCLKB, EXPCLK, PCLP, CE, EXCLK, HHOLD, HSYNC |
-0.3 | VESD+0.3*2 | V | |
| Storage temperature | TSTG | -55 | +125 | °C |
